For bumped wafers, ATX is currently offering a Die Preparation Services (DPs) and a full WLCSP capability which involve wafer lamination process and probing test process. in addition to beingcommited for offering a ful turn-key services, ATX has released CAPEX to establish its own waferbumping capability at ATX Kunshan. This will enable ATX to have a full freedom to control its packageoffering to the customers that will reguire a highly and advanced integration in terms of density and functionality.
WLCSP provides a direct connection between a device and the motherboard thru solder or Cu Pillar Interconnection. Main benefit is to provide the shortest signal path possible thus reducing the resistance and inductance effect for PA, RF, Power and other products that are sensitive to signal degradation.
For ATX to be at the forefront of smaller, thinner, and lighter assembly packaging solutions, Wafer_level-Fan-out is one of the capabilities being established to allow system integration at the wafer level.
Form factor reduction while increasing the number of l/Os are the main drivers to integrate more systemfunctionality, This will enable a Svstem in Package flexibility and intearation for 2D and 3D platform.
Wafer Level Fan-out has the extreme advantage of thermal and electrical performance as the shortenedinterconnection provides more freedom for parameter optimization.